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Front End Process: Overview of Logic and Memory Programs

 Raj Jammy PhD
  13th-May-2008
Views: 2526
Domain: Electronics
Category: Semiconductors
Contents:
Tokyo, Japan September 13, 2007

Front End Process Division
Overview of Logic and Memory Programs

Raj Jammy PhD Director, FEP Division

Front End Process Division: Scope
FEP Division
Advanced Gate/Memory Stacks Unit Process Electrical Characterization Metrology Unit Process/Integration
Strain Surface prep, RIE

CMOS Scaling

Dielectrics
Logic on Si, SiGe, Ge, III-V Memory MIS, MIM caps

Planar
J ... See more
Raj Jammy PhD
15 February, 2010