Linley Newsletter: February 23, 2017

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Linley Newsletter
(Formerly Processor Watch, Linley Wire, and Linley on Mobile)
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Issue #536
February 23, 2017

Independent Analysis of Microprocessors and the Semiconductor Industry

Editor: Tom R. Halfhill
Contributors: Loyd Case, David Kanter, Loring Wirbel

In This Issue:

- Ambarella Enhances Automotive Video
- Goldmont Takes Atom to 14nm
- Microsemi Adds Midrange FPGAs

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Ambarella Enhances Automotive Video
By Loyd Case

Ambarella's A9AQ video SoC supports multiple cameras for automotive applications, including electronic mirrors, surround view, and dashboard cameras. It combines dual ARM Cortex-A9 CPUs with the company's proprietary DSP, enabling high-dynamic-range (HDR) recording, 3D noise filtering, and LED-flicker mitigation. Compared with its predecessor, the A9 SoC, the new chip implements the rigorous Automotive Electronics Council (AEC) Q100 quality standard, broadening its target market. It began sampling in 4Q16; volume shipments are scheduled for 2H17.

Although the A9AQ functions well with the 32-bit Cortex-A9 CPUs, some applications require heavier lifting. Therefore, Ambarella also unveiled a pair of video SoCs that incorporate quad Cortex-A53 CPUs clocking at 1.0GHz or higher. One, the H22, targets mainstream consumer and action cameras, offering 4K H.265 encoding at 60fps and 1080p encoding at 120fps. The Ambarella DSP technology handles the digital image stabilization needed for capturing video in flight or otherwise on the go. The four A53s kick in for analytics and computer vision; in a low-cost drone, they can even handle flight control.

The company designed its other recently introduced SoC, the H3, for high-end drones, which often incorporate a separate application processor, and for surround-video capture in virtual-reality devices. Ambarella enhanced the image-processing pipeline to deliver 30fps 8K surround video (or equivalent resolution) by combining the inputs from several lower-resolution image sensors. Moreover, the pipeline adds a few features to better support surround video, including the ability to de-warp and stitch dual 60fps 4K streams captured using wide-angle or fish-eye lenses. Ambarella plans to manufacture the H22 and H3 using a 14nm FinFET process to minimize power. They will likely enter production in 2H17.

Microprocessor Report subscribers can access the full article:

Goldmont Takes Atom to 14nm
By David Kanter

Intel's new Goldmont CPU core takes advantage of a wider microarchitecture and 14nm manufacturing technology to boost performance by 30-60% for most workloads and up to 2.86x for cryptography compared with the 22nm Silvermont. The company has comprehensively overhauled the microarchitecture, going from a two-wide design with partially out-of-order execution to a three-wide design with fully out-of-order execution and twice the cache throughput.

These changes put Goldmont on a relatively even footing with ARM's Cortex-A72 and Cortex-A73, which are licensed by mobile and embedded competitors such as HiSilicon, NXP, and Qualcomm. Yet the new design stays comfortably below the performance of the Kaby Lake and Skylake cores.

Goldmont will appear in Intel products for everything from PCs and servers to embedded systems and IoT devices. It debuted in the company's Apollo Lake platform for low-end PCs and embedded applications, where it is branded as Celeron or Pentium and fits below more-expensive 4.5W Kaby Lake models. Apollo Lake also ships into embedded designs as the Atom E3900. In addition, Goldmont ships in the Joule module for IoT and will serve in the Intel Go automotive platform.

The third Goldmont-based SoC, code-named Denverton, targets communications and storage and will be marketed as the Atom C3000 family. We expect it will offer up to 16 Goldmont cores with integrated accelerators and networking and should arrive later in 2017. Some Denverton variants will likely appear in low-end servers, but the Xeon D is typically more attractive for this segment.

Microprocessor Report subscribers can access the full article:

Microsemi Adds Midrange FPGAs
By Loring Wirbel

Microsemi is parlaying a long-standing advantage of its Igloo and SmartFusion FPGAs by making power dissipation and security two differentiating features in the new PolarFire family. This most recent line of midrange FPGAs ranges from 100,000 to 500,000 logic elements (LEs), each with a four-input lookup table and a D flip-flop, pitting it directly against popular alternatives such as the Xilinx Kintex 7.

The company relies on the nonvolatile silicon-oxide-nitride-oxide-silicon (Sonos) process, employing a UMC implementation based on a Cypress Semiconductor technology to deliver lower power dissipation than competing SRAM-based FPGAs. Its flash-memory-based design is also immune to soft errors (or single-event upsets) caused by alpha particles. The company proudly calls its competitive strategy "midrange" and has populated its 28nm PolarFire family with 12.7Gbps serdes rather than 28Gbps serdes.

By combining the low-power process with hard intellectual-property (IP) cores for high-level security as well as with faster serdes, Microsemi has positioned PolarFire above cost-optimized offerings such as the Intel Cyclone and Xilinx Artix families. In addition, it reduced the cost per LUT and the power dissipation relative to the 28nm Kintex and Arria families. The Intel and Xilinx 20nm lineups address higher densities but incur greater die costs and static power dissipation.

Microsemi says a Sonos-based 28nm CMOS process from UMC not only meets the goal of lowest static dissipation, but it also has an advantage over floating-gate flash memory and SRAM in active serdes-transceiver operation. Rather than design a serdes for 28Gbps, the company optimized it for 12.7Gbps, producing a smaller interface with lower power dissipation. This feature makes PolarFire the only FPGA architecture in which the logic fabric consumes most of the total device power -- nearly 75%.

Microprocessor Report subscribers can access the full article:

About Linley Newsletter

Linley Newsletter is a free electronic newsletter that reports and analyzes advances in microprocessors, networking chips, and mobile-communications chips. It is published by The Linley Group and consolidates our previous electronic newsletters: Processor Watch, Linley Wire, and Linley on Mobile. To subscribe, please visit:

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Domain: Electronics
Category: Semiconductors

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