Linley Newsletter: June 20, 2019

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Issue #657

June 20, 2019

Independent Analysis of Microprocessors and the Semiconductor Industry

Editor: Tom R. Halfhill

Contributors: Linley Gwennap, Mike Demler, Bob Wheeler

In This Issue:

- Habana Offers Gaudi for AI Training

- MediaTek AI Engine Earns Top Marks

- Silicon Labs Upgrades Wireless MCUs

Save the Date: Linley Fall Processor Conference

Mark your calendars for October 23-24 when the Linley Fall Processor Conference returns to Santa Clara, California. This annual event will cover a broad variety of processor-related topics, including processors and IP for deep-learning, embedded, communications, automotive, IoT, server, and networking applications.

The two-day conference will feature curated technical presentations from leading chip and IP vendors, including several new announcements. Popular sessions include keynotes by industry thought leaders and analysts from The Linley Group as well as panel discussions. Our events are a great place to meet industry experts and network with your peers during breaks, lunches, and the exhibition and reception on the first evening of the conference.

For information about the Fall Processor Conference, access:

Interested in being a sponsor? Speakers are usually technical leaders from chip and IP vendors. Our events provide a great opportunity to present your latest product or technology to a knowledgeable and interested audience packed with potential customers and partners. For more information on sponsoring, please contact us at

Habana Offers Gaudi for AI Training

By Linley Gwennap

Habana Labs has achieved first silicon of its initial accelerator for neural-network training, outperforming Nvidia’s fastest chip on at least one benchmark. The startup claims the new Gaudi chip will exceed 1,650 images per second (IPS) when training the popular ResNet-50 model. This performance is slightly better than what Nvidia reports for its flagship V100. Habana says Gaudi will use only 140W when running this benchmark, half the V100’s power. These results would make Gaudi twice as power efficient as the V100 and even its little brother, the Tesla T4.

The 16nm Gaudi builds on the same basic architecture as Habana’s earlier Goya inference accelerator, which is already in production. Whereas Goya focuses on integer computation, Gaudi fully supports the floating-point formats that most training uses. Gaudi integrates High Bandwidth Memory (HBM2), and to enable large chip clusters, it features 100G Ethernet with remote-DMA (RDMA) capability. For ResNet-50, Habana expects clusters of up to 640 Gaudi chips to deliver near-linear performance scaling. Nvidia, by contrast, sees a severe efficiency drop beyond 16 GPUs.

Whereas Habana sells a single Goya-based product—a PCIe accelerator card—it plans to offer three Gaudi form factors. In addition to a 200W PCIe card, Gaudi will come in an OCP-compliant accelerator module that dissipates up to 300W. Facebook originated this Open Compute Project module design, and several chip providers (but not Nvidia) plan to support it. Habana is also developing a rack-mountable system, the HLS-1, that contains eight Gaudi chips and can serve as an element of a large cluster. The company is testing first silicon and expects all three Gaudi products to sample by the end of this year, which should lead to volume production by mid-2020.

Microprocessor Report subscribers can access the full article:

MediaTek AI Engine Earns Top Marks

By Mike Demler

A custom AI engine has become standard for premium-smartphone processors, but for the Helio P90, MediaTek brought that trend to the “super-mid” price tier, which it calls the new premium. Chinese handset makers Blackmore, Oppo, and Unefone use the chip in phones that sell for around $350, about one-third the price of Samsung’s flagship Galaxy S10+. But according to the latest results on the AI Benchmark website, the P90’s cumulative score puts it at the top of the list, leapfrogging the Qualcomm Snapdragon 855.

ETH Zurich’s AI Lab created the AI Benchmark tests. Version 2.1.2 focused on speed, putting Snapdragon ahead in most comparisons. Version 3.0.1, which arrived in March, added error (or accuracy) measurements; the P90 surpassed the 855 on every one of them, including by 25% on Inception v3 classification. The tests use Android 9.0 (Pie) hardware acceleration and the same TensorFlow Lite back end on all chips. Huawei, MediaTek, Qualcomm, and Samsung each support that operating system and neural-network framework.

MediaTek recently announced it plans to employ the next-generation APU 3.0 in its forthcoming 5G smartphone SoC, which is also the first announced design with Arm’s new top-of-the-line Cortex-A77 CPU and Valhall-based Mali-G77 GPU. It will manufacture the yet-to-be-named Helio processor using 7nm TSMC technology, but it withheld specifics on the CPU/GPU configuration and its choice of EUV or non-EUV processes.

Microprocessor Report subscribers can access the full article:

Silicon Labs Upgrades Wireless MCUs

By Tom R. Halfhill

Mindful of the embarrassing security breaches that plague first-generation IoT devices, Silicon Labs is girding its newest wireless microcontrollers with hardier security hardware. Secure boot, cryptography acceleration, side-channel defenses, a secure debug port, and a true-random-number generator (TRNG) are among the improvements. The new EFR32xG21 chips in the Wireless Gecko Series 2 family are also the first Silicon Labs products to adopt Arm’s Cortex-M33, and they have enhanced 2.4GHz radios for popular IoT protocols.

Shipping in volume since April, these 32-bit wireless MCUs target line-powered IoT. The company is also developing plug-and-play wireless modules and battery-friendly models that will inherit the power-saving features of its Wireless Gecko Series 1 family. Already, the new chips rank among the lowest-power wireless MCUs on the market. In active mode (albeit with their radios silent), they draw only 51 microamps per megahertz. And they’re tiny, cramming all their features into a 4mm surface-mount QFN package with only 32 pins.

The new chips are essentially 32-bit MCUs with integrated radios for the most popular IoT wireless protocols. The EFR32BG21 implements the Bluetooth 5.1 protocol, including Bluetooth Low Energy (BLE) and Bluetooth Mesh; the EFR32MG21 implements those protocols plus Zigbee 3.0, Thread, and IEEE 802.15.4. Each design also is available with different integrated power amplifiers. Silicon Labs claims they can operate at up to twice the range of competing products.

As usual with MCUs, the on-chip memories also vary. Some models have 512KB, 768KB, or 1,024KB of flash memory and 64KB or 96KB of SRAM. Otherwise, the EFR32xG21 products are virtually identical. All can operate their Cortex-M33 cores at up to 80MHz, and they share the same integrated peripherals, I/O interfaces, and security features. List prices for 1,000-unit volumes are less than $5, depending on the radio output power, flash memory, and SRAM.

Microprocessor Report subscribers can access the full article:

About Linley Newsletter

Linley Newsletter is a free electronic newsletter that reports and analyzes advances in microprocessors, networking chips, and mobile-communications chips. It is published by The Linley Group. To subscribe, please visit:

Domain: Electronics
Category: Semiconductors
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