Linley Newsletter: March 21, 2019

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Linley Newsletter

Please feel free to forward this to your colleagues

Issue #644

March 21, 2019


Independent Analysis of Microprocessors and the Semiconductor Industry

Editor: Tom R. Halfhill

Contributors: Linley Gwennap, Mike Demler, Bob Wheeler


In This Issue:

- Broadcom Fills Out 5G-Network Line

- Syntiant Knows All the Best Words


Linley Spring Processor Conference 2019

Program Available Now!

April 10-11, 2019

Hyatt Regency Hotel, Santa Clara, California

The program for the Linley Spring Processor Conference is now posted online, and FREE registration for qualified attendees is open!

This two-day event includes technical presentations, new product disclosures, and panel discussions focusing on the processors and IP cores used in deep learning, embedded, communications, IoT, and server designs. An open-bar reception with exhibits concludes the first day. We also have two keynotes:

"A Deep Dive Into Deep Learning," by Linley Gwennap, Principal Analyst, The Linley Group

"After Meltdown and Spectre: Security Concerns Facing Contemporary Microarchitectures," by Jon Masters, Computer Architect, Red Hat

This conference is for service providers, equipment vendors, system designers, chip designers, software developers, press, and the financial community. Registration is FREE for qualified applicants. Click here to view the program or to register: https://linleygroup.com/SPC19

Sponsors: Arm, Intel, Flex Logix, Arteris IP, Cadence, Synopsys, Ceva, Inside Secure, Micron, Andes Technology, Wave Computing, SiFive, eSilicon, Rambus, and the Embedded Vision Alliance.


Broadcom Fills Out 5G-Network Line

By Bob Wheeler

From fronthaul to core, 5G networks demand the newest in Ethernet technologies. Broadcom already offered many of them, but it recently announced two new switch chips that upgrade its aggregation capabilities. Due to sample next quarter, Qumran2a and Jericho2c build on the initial 16nm StrataDNX family announced one year ago. They also join the company's Monterey fronthaul switch, which has reached production. Broadcom's 5G switching portfolio now spans 300Gbps fronthaul chips to chassis chipsets that scale to hundreds of terabits.

Jericho2 serves line cards in those core chassis, handling port speeds up to 400Gbps. It's a massive 10Tbps chip that integrates a pair of High Bandwidth Memory 2 (HBM2) die stacks in package. Offering 4.8Tbps of bandwidth, the new Jericho2c targets provider-edge routers and metro backhaul, where 100G Ethernet ports are more common. It's essentially half a Jericho2, using one packet-processing pipeline instead of two and a single HBM2 stack. Jericho2c adds an Interlaken interface for connection to OTN framers such as Microchip's Digi-G5.

Qumran2a targets fixed-configuration systems for the midhaul, which is a new 5G-network segment that sits between distributed baseband units (DUs) and central units (CUs). It offers 800Gbps of bandwidth, more than twice that of its access-oriented predecessor, the 28nm QumranAX. It handles the Optical Internetworking Forum's Flex Ethernet (FlexE) specification as well as port speeds up to 400Gbps. Unlike Jericho2, it uses external GDDR6 buffer memory to reduce cost relative to HBM2, which requires an expensive interposer.

To complete its 5G offering, Broadcom has taped out six different switch chips. Although some of them serve multiple markets, the company's 5G investment is nonetheless considerable. Most Ethernet chip vendors focus on other markets, particularly data centers, leaving OEM ASICs as Broadcom's primary 5G competition.

Microprocessor Report subscribers can access the full article:

https://www.linleygroup.com/mpr/article.php?id=12113

Syntiant Knows All the Best Words

By Mike Demler

Syntiant, a neural-network-processor startup, publicly touts analog in-memory computing as its raison d'etre, but its first products implement an entirely digital architecture. Potential customers expressed interest in the company's low-power digital prototype, so it decided to build a production version. The NDP100 and NDP101 use digital multiply-accumulate (MAC) units rather than the flash-memory-based multipliers that Syntiant plans to use in its analog design.

The NDP10x targets always-on near-field keyword and speaker recognition in battery-powered devices, including earbuds, headsets, remote controls, and other voice-activated products. It can also recognize other acoustic events, such as broken glass and gunshots. The company manufactures the chips in a 40nm ULP process. It delivered first samples in July 2018 and expects to ship production volumes in 2Q19.

During active operation, the NDP10x consumes less than 200 microwatts, but Syntiant expects that replacing the digital MACs with its analog technology will deliver additional power savings. The inference engine handles 4-bit weights, which require half the power to compute, move, and store data compared with the more common INT8 data type. The NDP10x provides 2.0 trillion operations per watt, which at 200 microwatts is equivalent to 4.0 million operations per second. Using Syntiant's Python-based training-development kit (TDK), customers can train the NDP10x to recognize up to 64 words. The inference engine can classify 100 words per second.

Microprocessor Report subscribers can access the full article:

https://www.linleygroup.com/mpr/article.php?id=12115

About Linley Newsletter

Linley Newsletter is a free electronic newsletter that reports and analyzes advances in microprocessors, networking chips, and mobile-communications chips. It is published by The Linley Group. To subscribe, please visit:

http://www.linleygroup.com/newsletters/newsletter_subscribe.php

Domain: Electronics
Category: Semiconductors

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