Linley Newsletter: May 30, 2019

 weSRCH's Best of the Internet Award
  31st-May-2019
 175


Linley Newsletter

Please feel free to forward this to your colleagues

Issue #654

May 30, 2019


Independent Analysis of Microprocessors and the Semiconductor Industry

Editor: Tom R. Halfhill

Contributors: Linley Gwennap, Mike Demler, Bob Wheeler


In This Issue:

- Cortex-A77 Improves IPC

- Arm Machine-Learning Core Scales Up

- Xilinx Enters Smart-NIC Market


Cortex-A77 Improves IPC

By Linley Gwennap

After a big revision in Cortex-A76, Arm's newest high-end CPU takes a more incremental approach but still delivers a sizable performance gain. The new Cortex-A77 borrows the pipeline and basic microarchitecture from its predecessor while adding a few features. Using the new level-zero (L0) cache, the A77 can issue six instructions per cycle, although it's limited to four decoders. To support the faster front end, it adds a second branch unit and a fourth integer ALU. The architects also expanded the reordering capacity, improved the branch prediction, and added other enhancements based on their experience with the A76 design.

As a result, Arm expects Cortex-A77 to deliver about 20% better integer performance than Cortex-A76 at the same clock speed. Since the pipeline is the same, the clock speed should remain constant in the same IC process. This gain comes atop a 35% per-clock improvement for the A76. Initial customers received production RTL for the new core, code-named Deimos, in 4Q18; the first phones using A77-based processors are due early next year. Arm withheld licensee names, but we expect Huawei, which was first to market with the A76 in its Kirin 980 smartphone processor, to be the lead A77 customer. Qualcomm is likely to deploy a modified A77 core in its next-generation Snapdragon 865.

The performance boost brings Cortex-A77 closer to custom Arm-compatible CPUs from Samsung and Apple in single-core performance, but we still expect those companies to maintain a lead, particularly once they debut their own next-generation designs. Arm continues to balance performance against power and die area, but it's shifting more weight to performance. The company must also balance the needs of its smartphone customers against those of its server customers; we expect its next-generation Neoverse CPU, called Zeus, is based on the Deimos design.

Microprocessor Report subscribers can access the full article:

https://www.linleygroup.com/mpr/article.php?id=12150

Arm Machine-Learning Core Scales Up

By Mike Demler

At Computex, Arm announced general availability of production RTL for its first neural-network accelerator, although it has yet to baptize the design with a brand name such as Cortex or Mali. The accelerator officially carries the generic label "machine-learning processor" (MLP). In 2Q18, the company disclosed preliminary details of the new core, but the production version increases power efficiency and performance, and it includes a multicore option that allows connection of eight cores to deliver up to 32 trillion operations per second (TOPS).

The MLP connects to a host CPU through its Ace-Lite interface, and each MLP core can integrate up to 16 parallel compute engines (CEs). The CEs share an embedded microcontroller that distributes the workload. They share DMA and sync units as well. The data-flow architecture comprises a feature-map reader, a weight decoder, a convolution engine, a programmable-layer engine, and one 64KB SRAM per CE to store weights and activations. The decoder processes weights in a compressed format. The CEs also compress activations before storing them in the local SRAM, reducing bandwidth requirements by up to 3x relative to uncompressed data.

The convolution engine integrates 128 INT8 multiply-accumulate (MAC) units, which also support INT16 operations. For INT8 precision, the maximum performance per core is 4 TOPS. The company originally positioned the MLP for mobile devices, where 4 TOPS is more than sufficient. But Apple, MediaTek, Qualcomm, and Samsung have designed their own DLAs, and some reports indicate Huawei has, too. That market will be difficult for the MLP to break into. Because of the limited mobile-processor opportunities, we expect the company added multicore support to address automotive, video surveillance, and other high-performance applications.

Microprocessor Report subscribers can access the full article:

https://www.linleygroup.com/mpr/article.php?id=12149

Xilinx Enters Smart-NIC Market

By Bob Wheeler

With its $400 million acquisition of Solarflare, Xilinx is bringing important server-networking intellectual property in house. The move enables it to offer Solarflare's FPGA-based network interface cards (NICs) and move up the value chain. This vertical-integration step is similar to the company's introduction last year of Alveo cards for server compute acceleration. Xilinx is paying a premium price, however, for privately held Solarflare.

Once a high-flying startup, Solarflare survived the last decade as a small NIC vendor serving vertical markets such as financial technology (fintech), where it achieved particular success in electronic trading. Beyond its specialized but low-volume vertical markets, however, it struggled to compete with larger vendors such as Mellanox. A June 2018 strategic investment from Xilinx, as well as longtime backer Oak Investment Partners, indicated a new direction for the company. In March, Solarflare and Xilinx demonstrated a NIC that uses only an FPGA to handle dual 100Gbps Ethernet ports; that is, the FPGA implements the complete controller function, including the PCIe interface, in addition to offloads.

Xilinx declined to discuss its plans for Solarflare's products and technology before the deal closing. We expect it will focus on FPGA-based smart NICs using Solarflare's controller intellectual property. It'll probably discontinue development of ASIC-based NICs while continuing to support existing products and customers. The big question is its plans for FPGA-based NICs in high-volume cloud applications.

Microprocessor Report subscribers can access the full article:

https://www.linleygroup.com/mpr/article.php?id=12148

About Linley Newsletter

Linley Newsletter is a free electronic newsletter that reports and analyzes advances in microprocessors, networking chips, and mobile-communications chips. It is published by The Linley Group. To subscribe, please visit:

http://www.linleygroup.com/newsletters/newsletter_subscribe.php

Domain: Electronics
Category: Semiconductors

Recent Newsletters

Linley Newsletter: August 8, 2019

Linley Newsletter Please feel free to forward this to your colleagues Issue #664 August 8, 2019 Independent Analysis of Microprocessors and the Semiconductor Industry E

08 August, 2019

Linley Newsletter: August 1, 2019

Linley Newsletter Please feel free to forward this to your colleagues Issue #663 August 1, 2019 Independent Analysis of Microprocessors and the Semiconductor Industry E

01 August, 2019

Linley Newsletter: July 25, 2019

Linley Newsletter Please feel free to forward this to your colleagues Issue #662 July 25, 2019 Independent Analysis of Microprocessors and the Semiconductor Industry

25 July, 2019