Linley Wire: November 3, 2014

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Linley Wire

Volume 14, Issue 17

November 3, 2014

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Independent Analysis of the Networking-Silicon Industry

Editor: Bob Wheeler

Contributor: Loring Wirbel

In This Issue:

- Aquantia Enables 2.5GbE Over UTP

- Tomahawk Delivers 32x100G Ports

- Cavium Touts Revolutionary Switch

Free Proceedings Available Now:

Linley Tech Processor Conference 2014

Free proceedings are now available for the Linley Tech Processor Conference, which was held at the Hyatt Regency in Santa Clara on October 22-23. This conference focused on processors for enterprise- and carrier-communications systems. In addition to more than 20 technical presentations by experts from industry-leading companies, the two-day conference program included a keynote session covering technology and market trends in communications systems.

The technical presentations described the latest processor chips, processor IP, and other technologies required to efficiently process data in embedded, enterprise, and cloud applications. Additional topics included security, wireless base stations, and high-performance memories for networking.

The proceedings are free with website registration:

Aquantia Enables 2.5GbE Over UTP

By Loring Wirbel

Aquantia has extended the capability of its 28nm AQ2xxx PHYs from three speeds to five by using proprietary signal-processing capabilities to add 2.5Gbps and 5Gbps modes; the former three-speed design supported 100Mbps, 1Gbps, and 10Gbps. Dubbed AQrate, the two new modes can transmit over 100 meters of Category 5e and Category 6 unshielded-twisted-pair (UTP) wiring. The company intends to make its 2.5Gbps and 5Gbps modes industry standards by forming an alliance around its interface. Thus far, Freescale and Xilinx have announced support for Aquantia’s new PHYs: the former for its QorIQ T1 processors and the latter for its full line of FPGAs and SoCs.

Aquantia introduced the new modes just as Broadcom, with support from Cisco, filed a formal Call for Interest (CFI) with the IEEE’s 802.3 working group for a “next generation enterprise access Base-T PHY” that employs one or more physical interfaces with rates between 1Gbps and 10Gbps.

Broadcom and Cisco also made 100-meter transmission over Cat5e a primary goal of their CFI. Aquantia insists this effort is a reaction to its three-year effort in this area and says it has yet to see samples of competitive silicon that implements these PHY speeds.

The 2.5Gbps and 5Gbps modes could prove especially important for applications such as 802.11ac wireless LANs, as they allow enterprises to preserve legacy UTP wiring. Xilinx also sees uses for five-mode PHYs in 2D- and 3D-torus fabrics.

Networking Report subscribers can access the full article here:

Tomahawk Delivers 32x100G Ports

By Loring Wirbel

Broadcom sampled its long-rumored Tomahawk switch to lead customers, becoming the first vendor to offer 32 ports of 100Gbps Ethernet in a single 3.2Tbps switch chip. Although it will face competition before year’s end, the seven-billion-transistor StrataXGS Tomahawk (BCM56960) targets a new class of cloud and consolidated-data-center customers.

The switch is designed around 128x25Gbps serdes, enabling 32x100Gbps, 64x40/50Gbps, or 128x10/25Gbps Ethernet ports. Broadcom has been instrumental in driving the 25G Ethernet Consortium that prodded the IEEE to consider native 25GbE and 50GbE standards, and it is promoting Tomahawk to customers as a means of upgrading 10GbE and 40GbE to 25GbE and 50GbE, respectively. The company demonstrated Tomahawk passing 100Gbps traffic through all 32 ports simultaneously; it claims a typical packet latency of less than 400ns.

Broadcom will soon face competition from a similar-density Cavium switch with highly configurable packet-handling features. Building on capabilities from its Trident family, Broadcom offers a new suite of packet-parsing features that it calls SmartFlow, though this suite seems to offer less flexibility than Cavium’s XPA.

By rapidly developing the follow-on to Trident II, Broadcom gained the opportunity to dominate high-end ToR, EoR, and leaf/spine switches in data centers that are moving to 100GbE. At the same time, the company declared itself an important proponent of the effort to use 25Gbps and 50Gbps ports as alternative formal PHYs in future Ethernet designs. Any vendor seeking to eat into the leader’s market share must demonstrate an architecture by mid-2015 at the latest. It must also offer significant power-dissipation, packet-latency, or device-configurability advantages if it’s to have any chance of challenging Broadcom’s dominance.

Networking Report subscribers can access the full article here:

Cavium Touts Revolutionary Switch

By Loring Wirbel

Mere weeks after acquiring Xpliant in an unusual purchase that followed investment funding, Cavium launched the first chip from the Xpliant developers. The CNX880xx Xpliant Packet Architecture (XPA) scales from 880Gbps to 3.2Tbps and offers up to 32x100Gbps, 64x40/50Gbps, or 128x10/25Gbps Ethernet ports, as well as various port-speed combinations.

In addition to making direct port-density and port-speed comparisons with market leader Broadcom, Cavium says the XPA’s configurable table architecture delivers greater flexibility than a typical Layer 2/3 switch. The device implements a packet-processing pipeline that is protocol independent and emphasizes packet-handling flexibility. Through Cavium-supplied software, the XPA supports a rich suite of Layer 2 and 3 protocols and features. Besides packet parsing, the table-driven architecture enables packet editing and header modification, flexible lookup-table sizes, integrated queue-based traffic management, and counters for a wide array of statistics. CaCvium promotes the XPA as ideal not only for SDN based on OpenFlow protocols, but also for any emerging network based on new or rapidly changing protocols.

Xpliant’s intent from its founding was to develop a switch with market-leading port density and speed while offering configurable features that allow unmatched unprecedented flexibility in packet parsing, table lookup, packet-header editing, traffic management, and statistics gathering. The XPA’s integration of serdes is impressive in its own right, with the CNX880xx offering as many as 128x25Gbps serdes blocks, configurable in a variety of implementations such as 32x100Gbps, 64x50/40Gbps, or 128x25/10Gbps. Nevertheless, Cavium tried to avoid a purely port-by-port race with Broadcom, instead opting for the type of flexibility that would give it an edge over Broadcom as well as Intel, Marvell, and Mellanox.

Networking Report subscribers can access the full article here:

About Linley Wire

Linley Wire is a free electronic newsletter published by The Linley Group, a technology analysis and strategic consulting firm. Linley Wire will present our analysis of recent news on semiconductors for networking and communications. Articles are posted weekly to our web site and sent monthly via email. To access the web content directly, visit our web site.

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Copyright 2014, The Linley Group

Domain: Electronics
Category: IT

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