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Mark Bohr: The Scaling + Heterogeneous Integration Era

 Mark Bohr     Intel Corporation
  24762      Feb 21, 2019
Mark Bohr, part 3: His fourth era of Moore's Law is marked by further difficulties in making transistors smaller. So new ways of scaling need to be developed to keep device density rising. In this third video, Mark describes what he believes the future of Moore's Law will entail. This includes new layout techniques, or something Mark calls "Hyper-Scaling," that help pack more transistors into a given area. The other is a collision of electrical and economic realities. The electrical reality is that to keep improving compute Performance-per-Watt, memory has to be brought closer to the processor. In the past, that was done by adding cache memory on chip. But this has reached its limits and even more memory is needed. The economic reality is that the added complexity putting all this into a single chip makes the cost of the chip unviable. Both collide to push the need for heterogeneous integration.  The last in this video series is next: Mark Bohr's Rules of Innovation.

About weVISION: weVISION is a series of video interviews of visionaries by G Dan Hutcheson, his career spans more than thirty years, in which he became a well-known as a visionary for helping companies make businesses out of technology. This includes hundreds of successful programs involving product development, positioning, and launch in Semiconductor, Technology, Medicine, Energy, Business, High Tech, Environment, Electronics, healthcare and Business divisions.

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