Linley Newsletter: December 6, 2018

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Linley Newsletter

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Issue #629

December 6, 2018


Independent Analysis of Microprocessors and the Semiconductor Industry

Editor: Tom R. Halfhill

Contributors: Linley Gwennap, Mike Demler, Bob Wheeler


In This Issue:

- AMD Ships Industry's First 7nm GPU

- TI Samples Its First 64-Bit Arm

- Renesas Focuses on ADAS Cameras


AMD Ships Industry's First 7nm GPU

By Linley Gwennap

Jumping ahead of archrival Nvidia, AMD announced the industry's first 7nm GPU, with shipments expected to begin this quarter. But the new chip will bypass PC gamers and head straight for the data center, serving mainly AI and high-performance-computing (HPC) workloads.

To get to market sooner, the company reused its Vega architecture, shrinking it to TSMC's leading-edge 7nm technology. AMD will offer the 7nm Vega in two Radeon Instinct PCIe cards: the flagship MI60 board is scheduled to ship in December, followed by the MI50 board in early 2019.

Whereas the older Vega10 GPU features two High Bandwidth Memory (HBM2) channels, the 7nm Vega20 doubles that number. This change, along with a slightly faster (1.0GHz) interface, gives it more than 1.0TB/s of memory bandwidth. The 16-lane PCI Express interface also doubles in bandwidth by implementing the new Gen4 specification. Vega20 adds two Infinity Fabric links that can connect up to eight GPUs in a cache-coherent cluster. AMD's new accelerator cards offer the same 300W TDP rating as the earlier MI25 card.

The new manufacturing technology increases the peak clock speed by 20%, lifting performance accordingly. Whereas Vega10 had poor FP64 performance, the new design handles FP64 at half the rate of FP32, making it better suited to HPC. It also adds support for 8-bit-integer (INT8) data, doubling performance relative to FP16.

For floating-point applications that require single precision (FP32) or double precision (FP64), the MI60 delivers performance similar to that of Nvidia's high-end Tesla V100 GPU, particularly when compared with the slower PCIe version. But applications that use Nvidia's tensor engines will lag considerably on the Vega cards, which lack tensor acceleration.

Microprocessor Report subscribers can access the full article:

http://www.linleygroup.com/mpr/article.php?id=12066

TI Samples Its First 64-Bit Arm

By Tom R. Halfhill

Seven years after the Arm v8 debut, Texas Instruments is sampling its first products using the 64-bit architecture -- and they're worth the wait. The new Sitara AM65x embedded processors are the most full-featured chips yet seen for next-generation "Industry 4.0" applications. They supersede the 32-bit Sitara AM57x series and surpass in most ways the industrial-oriented processors from rival vendors, including some new chips that NXP recently announced.

The flagship Sitara AM6548 has four 64-bit Cortex-A53 CPUs plus two 32-bit Cortex-R5F microcontroller cores with functional-safety features. It also integrates an Imagination Technologies GPU, video in/out interfaces, a dozen proprietary RISC cores in three real-time-control subsystems, and six Gigabit Ethernet (GbE) ports that implement the IEEE Time-Sensitive Networking standard. Cryptography acceleration, secure boot, PCI Express, USB, and scratchpad memories round out the mix. The DRAM interface and all internal memories and caches have single-bit error correction (ECC) to improve reliability.

Sitara AM65x chips are well equipped for their primary target: modern factory networks that need real-time processing and deterministic communications. They can serve as gateways between low-level machine controllers and high-level supervisory systems, aggregating the data and transmitting it over a standard Ethernet network. Their dual Cortex-R5F microcontroller cores can run factory machinery in isolation from the main CPUs, and the PowerVR GPU can drive industrial-control terminals. The video input can connect to cameras for surveillance or remote monitoring, and the 12 real-time cores can power advanced robotics systems.

TI began sampling the quad-core AM6548 in October, and all the chips are scheduled for production in 2H19. So far, the series comprises five products: the quad-core AM6548 and AM6546 and the dual-core AM6528, AM6526, and AM6527. The AM6546, AM6526, and AM6527 omit the PowerVR GPU. List pricing ranges from $23 to $70.

Microprocessor Report subscribers can access the full article:

http://www.linleygroup.com/mpr/article.php?id=12067

Renesas Focuses on ADAS Cameras

By Mike Demler

A computer-vision (CV) processor designed for camera-based advanced driver-assistance systems (ADASs), the V3H is the newest product in Renesas's third-generation R-Car platform. It boosts performance by 5x compared with its predecessor, the 28nm R-Car V3M. Combining all of its compute engines, the new chip can execute four trillion operations per second (TOPS). The convolutional-neural-network (CNN) accelerator delivers 426 billion multiply-accumulate operations per second (GMAC/s) while consuming just 300mW. The company manufactures the V3H in 16nm technology. The chip is sampling now and is scheduled to reach volume production in 3Q19.

The V3H integrates several hard-wired cores based on the company's intellectual property (IP), along with a custom DSP-based vision processor that allows customers to run their own software. It primarily targets object recognition using front-facing mirror-mounted cameras, but it can also combine live video from as many as eight cameras to stream 360-degree surround views to a cockpit display.

The chip offers the CV features necessary for Level 2 and Level 3 systems, which are likely to be the fastest-growing segment of the ADAS market for the next several years. Europe's New Car Assessment Program (Euro NCAP) is driving smart-camera requirements, and other regions are likely to follow. In 2020, to earn the organization's highest five-star safety rating, cars must include autonomous emergency braking (AEB), cross-traffic alerts, lane-departure warning (LDW), and traffic-sign recognition. The V3H targets these applications in camera-based systems, and it supports lidar sensors as well. LeddarTech uses the predecessor V3M in its solid-state lidars.

Microprocessor Report subscribers can access the full article:

http://www.linleygroup.com/mpr/article.php?id=12068

About Linley Newsletter

Linley Newsletter is a free electronic newsletter that reports and analyzes advances in microprocessors, networking chips, and mobile-communications chips. It is published by The Linley Group. To subscribe, please visit:

http://www.linleygroup.com/newsletters/newsletter_subscribe.php

Domain: Electronics
Category: Semiconductors

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