Linley Newsletter: May 24, 2018

 weSRCH's Best of the Internet Award
  24th-May-2018
 649


Linley Newsletter

(Formerly Processor Watch, Linley Wire, and Linley on Mobile)

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Issue #601

May 24, 2018


Independent Analysis of Microprocessors and the Semiconductor Industry

Editor: Tom R. Halfhill

Contributors: Linley Gwennap, Mike Demler, Bob Wheeler


In This Issue:

- ThunderX2 Strengthens ARM Servers

- BrainChip Aims to Spike Neural Nets

- Innovium Delivers 12.8Tbps Switch


ThunderX2 Strengthens ARM Servers

By Linley Gwennap

It's been a long time coming, but Cavium is now shipping its ThunderX2 processor. The chip features the most powerful ARM CPU yet to reach market, implementing a custom microarchitecture that runs circles around the best Cortex CPUs available today, although it falls short of Intel's massive Skylake. Still, the 32-core chip packs a mighty punch, delivering plenty of performance for mainstream data-center applications and even some high-performance computing (HPC).

The ThunderX2 CPU can fetch and decode four instructions per cycle and execute them using eight function units, including two for floating-point calculations. To further boost performance, each core supports up to four threads. In the fastest models, the CPU operates at a base speed of 2.5GHz and can reach 3.0GHz in turbo mode. The cores share 32MB of cache and eight DRAM channels -- two more than most other server chips. The ThunderX2 SoC integrates the south bridge, enables the popular dual-socket configuration, and comes with server-class reliability features.

The downside of this powerful design is power consumption, thanks in part to its lagging 16nm manufacturing technology. At its peak speed, the processor requires 210W TDP, although mainstream ThunderX2 models carry ratings of 140W to 180W. For customers that can stand the heat, the chip offers a cost-effective alternative to Xeon, selling for about half as much as comparable Intel products. HPC customers are particularly interested in the Cavium chip's strong memory bandwidth, which is a limiting factor in some scientific applications that use large data sets. But ThunderX2 must compete against several other processors that undercut Xeon's price, including AMD's revived Epyc family and Qualcomm's ARM-compatible Centriq.

Microprocessor Report subscribers can access the full article:

http://www.linleygroup.com/mpr/article.php?id=11974

BrainChip Aims to Spike Neural Nets

By Mike Demler

BrainChip specializes in neuromorphic processing that employs spiking neural networks (SNNs), which emulate how the brain handles sensory input by transmitting electrical impulses between neurons in the cerebral cortex.

Biological neurons respond to incoming spikes on the basis of their spatiotemporal relationships. Transmitting neurons send spikes through their axons to the synapses of numerous receiving neurons. The receiving neuron's potential energy changes according to the weight of each synaptic connection, meaning some neural connections are more significant than others. The timing of each spike is also important, since the neuron's accumulated potential energy decays over time.

The synaptic-weighting effect can be positive (excitatory) or negative (inhibitory). When the sum of the potentials induced by the incoming spikes crosses a threshold, it causes the receiving neuron to output its own spike, which is effectively an encoding of the information the brain has learned about the relationship of the inputs.

A CNN recognizes objects by operating directly on pixel data, progressively extracting and identifying higher-level features by convolving small windows in the image. But an SNN, to mimic the brain's behavior, first converts the image into an array of spikes. It emulates the visual cortex, converting colors, contrast changes, and the line segments constituting an object's shape into a spike train.

The company has developed techniques for converting sensor data to spikes and for modeling SNN behavior in its hardware and software. Its first hardware product is an FPGA implementation called the BrainChip Accelerator, but it's developing an SoC, called Akida, that it expects to tape out in 4Q18.

Microprocessor Report subscribers can access the full article:

http://www.linleygroup.com/mpr/article.php?id=11975

Innovium Delivers 12.8Tbps Switch

By Bob Wheeler

"Late" is a relative term, and "close" often counts in horseshoes and chip-design cycles. Innovium sampled its Teralynx 12.8Tbps switch only one quarter behind Broadcom's Tomahawk 3. Investors rewarded Innovium with a new $77 million funding round, bringing its total raised to more than $160 million. Walden International joined the latest round along with existing venture firms and strategic investor Qualcomm.

An aggressive startup, Innovium preannounced Teralynx with a 3Q17 schedule for samples. Taping out a brand-new design of this complexity requires a massive verification effort, however, and sampling ultimately slipped into March. In the meantime, Broadcom sampled and announced Tomahawk 3, nullifying Innovium's first-to-12.8Tbps claim.

Like that competitor, Teralynx implements 128x100G Ethernet ports using 256x50Gbps PAM4 serdes. It also handles 50G, 200G, and 400G Ethernet using PAM4 as well as 25G, 50G, and 100G Ethernet using NRZ. In addition to the 12.8Tbps IVM77700, the Teralynx family includes two 6.4Tbps variants and a 3.2Tbps variant. The 6.4Tbps IVM77500 omits PAM4, offering 256x25Gbps NRZ ports for backward compatibility with QSFP28 and SFP28 designs. The other 6.4Tbps version (IVM77510) provides 128x50Gbps PAM4 ports, serving 50GbE top-of-rack (ToR) systems. Finally, the 3.2Tbps IVM77310 implements 128x25Gbps NRZ ports for 25GbE ToR duties.

Remarkably, Innovium is posing the most direct challenge to Broadcom at the leading edge of data-center switching since the early days of 10GbE. Despite its delay in sampling, Teralynx is well within the window for the first PAM4-based switch designs. And the new funding gives Innovium the resources to support customer production ramps. Customers eager for an alternate vendor can now engage the startup with greater confidence that Teralynx will enable production deployments.

Microprocessor Report subscribers can access the full article:

http://www.linleygroup.com/mpr/article.php?id=11973

About Linley Newsletter

Linley Newsletter is a free electronic newsletter that reports and analyzes advances in microprocessors, networking chips, and mobile-communications chips. It is published by The Linley Group and consolidates our previous electronic newsletters: Processor Watch, Linley Wire, and Linley on Mobile. To subscribe, please visit:

http://www.linleygroup.com/newsletters/newsletter_subscribe.php

Domain: Electronics
Category: Semiconductors

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