Linley Newsletter: June 14, 2018

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Linley Newsletter

(Formerly Processor Watch, Linley Wire, and Linley on Mobile)

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Issue #604

June 14, 2018

Independent Analysis of Microprocessors and the Semiconductor Industry

Editor: Tom R. Halfhill

Contributors: Linley Gwennap, Mike Demler, Bob Wheeler

In This Issue:

- Arm's Project Trillium Starts to Bloom

- Cannon Lake Misfires

- Tachyum Targets Data Centers

Arm's Project Trillium Starts to Bloom

By Mike Demler

Arm has disclosed the first details (but not the name) of its forthcoming machine-learning processor core, which adds a deep-learning accelerator (DLA) to the Project Trillium platform. Project Trillium includes hardware and software components that enable machine-learning (ML) tasks to run on Cortex CPUs, Mali GPUs, and the new ML core (MLC); they also allow integration with third-party accelerators.

The MLC is a scalable neural-network inference engine. Arm's design accelerates convolutions and matrix multiplication, which typically comprise 90% of a CNN's operations. It uses 8-bit quantization and lacks support for other data formats, but INT8 is popular for inference engines. It also includes a programmable layer engine (PLE) that runs all non-convolution-layer operations in addition to providing a mechanism for running new layer types and network graphs.

The company plans to offer MLC configurations for automobiles, data centers, and IoT clients, but its first release targets mobile application processors. It tuned the design for 16nm and 7nm technologies, which it will enable with physically optimized (POP) hard-core versions. In 7nm technology, the MLC delivers up to 4.6 trillion operations per second (TOPS), and it consumes 1.5W at that peak rate. The POP intellectual property (IP) reduces the compute-engine area compared with the synthesizable-RTL version, and it reduces power by 10-20%. Several processor vendors are evaluating the MLC, and Arm plans to release the RTL and POP IP in 3Q18.

Microprocessor Report subscribers can access the full article:

Cannon Lake Misfires

By Linley Gwennap

Intel wanted to ship a 10nm product really badly, and that's what it finally did. With no formal announcement, a single Cannon Lake processor appeared on the company's website, and its specifications show just how badly the 10nm technology is performing. Despite the more advanced process, the new Core i3-8121U offers the same base clock as the 14nm Core i3-8130U (Kaby Lake) and a lower maximum speed. Worse yet, its integrated graphics unit is apparently nonfunctional, as the company has disabled it. The chip also missed its original TDP target.

The 8121U is a dual-core product, fitting into the bottom part of Intel's laptop line; the Core i5 and Core i7 families have already moved to quad cores. The new chip is similar to the 8130U, offering a 2.2GHz base frequency and a 3.2GHz maximum turbo speed. The Kaby Lake part, however, peaks at 3.4GHz in Intel's 14+ process. The company had warned that the initial 10nm transistors would be only slightly faster than 14+ transistors and slower than 14++, but the yield problems are apparently depressing clock speeds.

The missing GPU makes the new processor far inferior to the 8130U. The only known system using the 8121U is the Lenovo IdeaPad 330. This thin and light PC sells with various Intel processors, but one model with an 8121U was recently spotted for sale in Asia; this model includes an AMD Radeon GPU alongside the Intel processor. Yet according to reports, the sole Cannon Lake chip is now "sold out" and no longer available.

Microprocessor Report subscribers can access the full article:

Tachyum Targets Data Centers

By Tom R. Halfhill

Extraordinary claims require extraordinary proof, but we'll have to wait for the proof. Tachyum -- a startup based in Silicon Valley and Slovakia -- has announced a "universal processor" called Prodigy. Scheduled to sample in early 2020, Prodigy is designed to run data-center software, machine-learning algorithms, and high-performance-computing (HPC) workloads. Tachyum claims it will deliver 5-10x more performance per watt than today's Intel Xeon processors.

The company's cofounder and CEO is Rado Danilak, an engineer and entrepreneur whose resume includes Nishan Systems, Nvidia, SandForce, Skyera, Toshiba, and Wave Computing. His design experience encompasses GPUs, deep-learning processors, and flash-memory controllers. He previously founded Skyera (acquired by Western Digital) and cofounded SandForce (acquired by LSI). Tachyum's main backer is IPM Growth, an investment company established in 2014 to focus on central and eastern Europe. The amount of Tachyum's funding is undisclosed.

The startup is withholding many other details until the Hot Chips symposium in August but shared some information with Microprocessor Report. To achieve its lofty performance goals, Tachyum has designed a new 64-bit architecture that combines elements of RISC, CISC, and VLIW. The company says it will not only beat today's Xeons but will also compete strongly with GPUs on machine learning. In sum, Tachyum is making many promises that require extraordinary effort to fulfill.

Regardless of Prodigy's possible merits, Tachyum has a steep hill to climb. The company's best hope is to find a niche that exploits Prodigy's strengths and requires a relatively small set of recompiled software. That specialty may become obvious as more details of this new processor emerge.

Microprocessor Report subscribers can access the full article:

About Linley Newsletter

Linley Newsletter is a free electronic newsletter that reports and analyzes advances in microprocessors, networking chips, and mobile-communications chips. It is published by The Linley Group and consolidates our previous electronic newsletters: Processor Watch, Linley Wire, and Linley on Mobile. To subscribe, please visit:

Domain: Electronics
Category: Semiconductors

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