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Physical Design Challenges and Innovations to Meet Power, Speed, and Area Scaling Trend

 LC LU
  3rd-Jan-2018
Description: Process primary dimension (metal, gate and fin pitch) scales less and per generation cadence takes longer.
Views: 1102
Domain: Electronics
Category: Semiconductors
LithoVision 2018
Contents:
Physical Design Challenges and Innovations
to Meet
Power, Speed, and Area Scaling Trend
LC LU
TSMC
TSMC Fellow/Senior Director, R&D

© 2017 ISPD
ISPD 2017

1

Chip and System Integration Trends
for Better PPA & System Performance
Platform Solutions
Mobile

3D Transistors

High
Performance
Computing

(FinFET, GAA-NWT)

Automotive
CPU

Voice
Camera

Storage

SoC

IoT

MP3

Video

3D Stacking
( ... See more

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