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Silicon Photonics in Post Moore's Law Era: Technological and Architectural Implications

 Ke Wen, Sebastien Rumley, Payman Samadi, Christine P. Chen, Keren Bergman
  17th-Mar-2017
Description: Moore’s law is ending as we enter the last years of shrinking transistors. Chip designers will thus have to use the available transistors more effectively. One may interpret a few already signs of this trend. As shown in Figure 1, an area devoted to caching on a CPU chip is decreasing, both in terms of (a) MB per FLOPS and (b) normalized chip area -- cache size (MB) × features size (nm2) / die size (mm2).
Views: 856
Domain: Electronics
Category: Semiconductors
Contents:
1

Silicon Photonics in Post Moore’s Law Era:
Technological and Architectural Implications
Ke Wen*, Sébastien Rumley, Payman Samadi, Christine P. Chen, Keren Bergman
Department of Electrical Engineering, Columbia University, New York, *kw2501@columbia.edu

1 A RIPPLE EFFECT FROM CACHE REDUCTION

M

oore’s law is ending as we enter the last years of
shrinking transistors. Chip de ... See more

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