From a purely visual standpoint it is fascinating to watch as the cellular phone industry drives chipmakers towards packages which take up less room in the Z-dimension. Take yesterday’s phone, Treo, or Blackberry, place it alongside today’s sleeker and thinner version, and watch as a consumer-envy, I’ve-got-to-upgrade! mentality builds.
Just as war forces new technologies to the front, this battle to get thin is driving the packaging industry from ball grid arrays -- which can rise as much as 350 microns in height -- to system-in-package (SiPs), stacked memory die, package on package, and chips connected with through silicon vias. Freescale also is getting thinner with its RCP packaging technology.
Tessera has come up with another solution, called microPILR. pins which look like miniature cooling towers, to replace solder balls in chip packages. (see the paper section of WeSRCH for a Tessera presentation, and to the press release section as well).
Phil Damberg, vice president of next-generation packaging at Tessera, said the early introduction of the microPILR technology is likely to be in NAND flash devices. (The Tessera paper shows a 16-GByte thumb drive made with microPILR-stacked flash chips.)
Besides replacing BGAs, the pillars also can be used to replace the plated vias used in printed circuit boards to interconnect layers within the PCB. Rather than drill and plate the vias, the copper microPILR pins could be pressed into the next layer.
Damberg said some BGA ball pitches are as small as half a millimeter, causing shorts and reaching the limit of the surface mount equipment. As baseband devices in cellphones go to several hundred pins, the demand for a thinner, finer-pitch technology has increased.
“With the microPILR, we can reduce the mounted height, and we can reduce the design rules, providing more routability, more area to maneuver with an extra trace between the pins,” he said.
The microPILR also could change the testing landscape. Gordon Gray, senior product marketing manager at Tessera, said the sockets required to test memories can cost $5,000 to $7,000. The relatively soft solder balls can gunk up these sockets, impacting throughput. The microPILR pins can bypass the sockets and provide “excellent contact” with the tester.
Tessera has been working to transfer the technology to the assembly industry, as well as to the package substrate vendors. An early version of the technology was developed in Japan, at North Corporation, which develops circuit board technologies. Tessera and North signed a licensing and joint develop relationship in 2005 that paved the way for the microPILR development.
Toshiba Semiconductor issued a statement from Shozo Saito, executive vice president, saying that initial results from using microPILR to stack multiple NAND devices in a low-profile package are “promising.”