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Sematech's Raj Jammy: high-k's impact on CMOS performance

Posted on: 23-Feb-2007

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Raj Jammy, director of the front end processes division at Sematech since mid-2005, is an assignee from IBM Corp. For three years, he managed IBM’s efforts on high-k dielectrics and metal gates at the IBM T. J. Watson Research Center in Yorktown Heights, N.Y.
The first part of this interview appeared Thursday, Feb. 22nd.
 
Q. There are researchers who argue that high-k doesn’t do as much for performance as some had expected. What do you think?
Jammy: In high-performance devices, gate leakage became such a problem that for three generations, scaling of the gate stack completely stopped. Even so, other forms of leakage are more important than gate leakage in high-performance devices. And in ultra low power chips, there are additional knobs that can be used to control leakage.
 
Q. If carrier mobility in high-k devices is, say, 10 percent less than silicon dioxide, can we make up for that by using enhanced strain techniques to boost mobility back up to where it should be?
Jammy: Strain will always be there, we should not look at this as somehow compensating with strain. Our goal was inherently to develop oxides with no mobility loss. We did that, we have a hafnium system with very high mobilities. We will continue to build upon that.
When we think about mobility, we want mobilities that are good as native silicon dioxide. But even in existing gate stacks companies have been introducing more and more nitrogen into the oxide, and that results in a mobility loss.
What we have demonstrated is that by using a hafnium silicate, we can get mobilities as good as oxynitride. There is no loss of mobility at the same EOT (electrical or effective oxide thickness). If we had tried to do that with a hafnium nitride, the mobility also would be impacted.
 
Q. Nitrogen was introduced to get a thinner EOT?
Jammy: Yes, with existing dielectrics for a few generations the industry has used nitrided oxides. Even though mobility suffers, with the nitrides we get thinner EOTs, and suppress leakage. We can make the dielectric physically thicker and electrically thinner.
 
Q. And with high-k, we can make the EOT even thinner?
Jammy: We have to look at the total picture. The reason why high-k is so interesting is primarily leakage improvement. In some devices, leakage became so high that there was almost an indistinguishable difference between the on-state and the off-state. With high-k, our control is better. We can continue to couple with the channel and reduce the short channel effect. We have to work on SCE, and right now, gate stacks with high-k potentially can deliver better SCE.
 
Q. At IEDM, professor Akira Toriumi from the University of Tokyo talked about ways to boost the k-value of hafmium with lanthanum and other dopants. Is Sematech working on that?
Jammy: We had a Sematech paper at IEDM on that. By adding dopants to various hafnium-based systems, we showed that we can get dielectric constants as high as 36 or 40. The challenge when we scale the dielectric constant is to keep the dielectric sufficiently thin to make it attractive. Physically, we have to keep it thin, then electrically it can be even thinner. We want to keep 40-50 Angstroms of physical thickness to prevent leakage, and get an EOT below one nanometer. We have to reach the EOT targets for each node. 
 
Q. How long can we scale hafnium?
Jammy: At least another two generations. The industry may be happy with hafnium silicate or hafnium oxide for some time, and then we can take the same approach used now with SiO2, adding nitrogen. If the tooling exists at various plants, it would be helpful to continue to scale hafnium dielectrics to keep costs low.
 
Q. What are you working on now?
Jammy: The FEP is a broad-based program. We are looking at new transistor structures to maintain CMOS scaling. And we are looking at the gate stacks for the coming nodes which our members need. These are not trivial challenges.
 

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