weSRCH's Best of the Internet Award

May 26, 2017

This issue:
Deep Learning at NVIDIA GTC, AMD's Epyc Return To Servers, Google Builds Its 2nd Neural Net Chip, HPE The Machine Has A Surprise Inside

Thank you to those readers who provided feedback. We’re still tweaking the new formatting and want to product a newsletter that you find value in. Let us know what works, what doesn’t work, what’s just downright annoying to you. This includes subject manner, format, email service, etc. But our picture is non-negotiable. J

This issue has a lot of server and deep learning news, which is a bit outside the normal topics, but it was the most interesting news of the last month.
Pictured above are the TIRIAS Research Principal Analysts (From left to right: Kevin Krewell, Jim McGregor, and Paul Teich).

But first, a word from the newsletter’s founder:

Forward Concepts Publishes Major Global Smartphone & Tablet Market Study
The report also covers the Modems that enable them and global shipments by air interface
Mesa, AZ, U.S.A. April 18, 2017: Forward Concepts, a leader in DSP and wireless market research is proud to announce the publication of its newest report, “SMARTPHONE, TABLET & MODEM MARKET '17”. The 237-page report provides a detailed market analysis of all significant smartphones, connected-tablets and the modem chips that enable them. Vendor market shares for all vendors are provided with quarterly shipments through Q4/2016. Product forecasts in units and revenue are provided for 2017 through 2021

This report provides a detailed market analysis of all significant smartphones, wireless-connected tablets (cellular & Wi-Fi) and the modems that enable them. Five-year forecasts are provided in considerable detail for each. In addition, smartphone and non-smart cellphones are forecast for all global regions and the report discusses the 2017 market positioning of the major vendors.
The report reveals that 2016 smartphone shipments grew by 7% overall from 1.3 billion to 1.4 billion units. The 4G LTE smartphone shipments grew by 13% from 645.7 million to 741 million. Fifty one percent of smartphone shipments are now 4G growing from 48% in 2015.

The top suppliers of smartphone shipments for 2016 were Samsung at 21%, Apple 15.1%, Huawei 9%, Oppo 6.4%, Vivo/Vsun 4.8%, LG 4.2%, Xiaomi 4%, Lenovo 3.8%, ZTE 3.7%, and Alcatel (TCL) at 2.6%.

Exhibiting the largest volume growth rates were newcomers Oppo at 122%, LeEco 136%, Lava 103%, Vivo 93%, and Gionee at 39%. Growing at 36% Transsion, a leading Chinese supplier of non-OS voice centric phones into Africa, is ranked globally in the top 15 in smartphones for the first time.

Smartphone baseband processors, both integrated (like Qualcomm’s Snapdragons) and stand-alone “slim” modems (such as those employed by Apple) were led by Qualcomm, with 59% of 2016 shipments, followed by MediaTek at 23%. The more advanced 2017/2018 modems discussed in the report incorporate Category 15 Gigabit-class down-link data rates as well as advanced features like VoLTE and ViLTE.

Although Intel’s modem chips garnered only a small share for the 2016 $26 billion market, their 2017 market share will be boosted significantly as they are now incorporated in a large portion of Apple’s iPhone 7 shipments (and Qualcomm has the other part of iPhone modem shipments).

Uniquely, this report also covers global smartphone (and non-smart cellphone) shipments by region. Country and air interface. Major operators in each country are also discussed. This valuable report is aggressively priced at $3,500 for an enterprise-wide digital PDF copy.

For an overview of this expansive report and the detailed table of contents, please click here.

NVIDIA GTC All About Deep Learning
“At this year's GPU Technology Conference, Nvidia's premier conference for technical computing with graphic processors, the company reserved the top keynote for its CEO Jensen Huang. Jensen's message was that GPU-accelerated machine learning is growing to touch every aspect of computing. While it's becoming easier to use neural nets, the technology still has a way to go to reach a broader audience. It's a hard problem, but Nvidia likes to tackle hard problems.”

It’s also worth noting that the Volta V100 chip is a massive 815mm2 – with 21 billion transistors in TSMC's unique-to-NVIDIA’s 12nm FFN high-performance manufacturing process. Nvidia pushed the size of the die to the very limits of the optical reticle, it’s larger than most believed you can make a single die.

Read the whole story at Tech News World.

NVIDIA Goes Beyond The GPU For AI With Volta

Volta also includes over 5,000 GPU CUDA cores, 300 GB of system communications bandwidth through six high-speed NV Link interconnects, and 16 GB of the second generation high-bandwidth memory (HBM2) on TSMC’s new 12FFN manufacturing process technology. In all, the new Volta architecture fits in the same power envelope and form factor as the previous Pascal generation GPU with 1.5x the memory performance, 2x the NVLink performance, and 7.5 teraflops of FP64 processing (15 teraflops at FP32) on the GPU (CUDA) cores and a total of 120 teraflops of processing performance with the tensor cores. The first product using the Volta architecture is the Tesla V100. No matter how you look at it, the Volta architecture and Tesla V100 set a new level of computing performance on a chip that will benefit AI. Now imagine what eight of these are capable of in NVIDIA’s DGX-1 platform with the industry’s most mature AI software environment and tools. The Volta architecture and Tesla will also accelerate many high-performance computing (HPC) applications and is already slated for use in the next US supercomputer, the Summit Supercomputer, which is slated to have over 200 petaflops of performance. But, the performance of Volta is only half of the story.
The significance of Volta is that this marks a transition of the most pervasive deep learning engine from a GPU or general processing engine to a more specialized engine for AI.

Read the whole story at Forbes Tech.

AMD Second Run At Data Center Might Succeed With Epyc 2X Performance
Back in March TIRIAS said “…the folks at AMD have been very busy. At this stage, it looks like the company is executing pretty much on plan.” That turns out to be an understatement. At AMD’s May 16 financial analyst day (FAD) event, AMD performance analysis of their upcoming Epyc-branded server system-on-chip (SoC) parts (formerly code-named “Naples”) showed that one socket of Epyc performance equals two of Intel’s mainstream Xeon E5 processor sockets. AMD emphasized that single-socket servers make a lot of sense for cloud data centers. I agree, single-socket servers have substantial implications for hyperscale data center architecture and total cost of ownership (TCO) – both for public cloud economies of scale and smaller private cloud economies of scale.

The key is AMD compared a single-socket Epyc system against a mainstream, high-volume Intel Xeon dual-socket system, performing the same Linux kernel compile. The dual-socket Xeon system came in 10% slower than the single-socket Epyc system. This means that system vendors can either A) shrink a dual-socket Xeon system down to a smaller Epyc form factor, with both less component cost and less power consumption or B) supersize their dual-socket system with dual Epyc processors.

Read the whole story at Forbes Tech.

Under The Hood Of Google’s TPU2 Machine Learning Clusters
At Google I/O last week. Google revealed a new generation “Google Cloud TPUs”, but provided very little information about the TPU2 (Tensor Processing Unit) chip and the systems that use it other than to provide a few colorful photos.

Google designed the TPU2 specifically to accelerate focused deep learning workloads behind its core consumer-facing software such as search, maps, voice recognition and research projects such as autonomous vehicle training. Our rough translation of Google’s goals for TRC is that Google wants to recruit the research community to find workloads that will scale well with a TPU2 hyper-mesh. Google says the TRC program will start small but expand over time. The rest of us will not be able to directly access a TPU2 until Google’s research outreach finds more general applications and Google offers a TensorFlow hardware instance as infrastructure in its Google Cloud Platform public cloud.

Paul went deep into the Google Cloud TPU pictures and teased out a lot of interesting information. Read the whole story at The Next Platform.

HPE The Machine Sets Memory Record And Uses Single-Socket ARM Processors
There are four elements to HPE’s recent disclosures on The Machine:
1. A very large 160 Terabyte (TB) pool of physical shared memory.
2. HPE’s X1 photonics module is operational and in use in the prototype. Without the X1 module, The Machine’s global memory pool would not be performant at any meaningful scale.
3. Use of a 64-bit ARM server system-on-chip (SoC), namely Cavium’s upcoming ThunderX2 SoC. HPE has been working closely with Cavium. Given that ThunderX2 has not yet launched, I think this live demonstration is a good sign that Cavium is hitting ThunderX2 performance and sampling targets.

4. Software development tools designed for systems with large scale persistent memory.

Read the whole story at Forbes Tech.

TIRIAS Research Can Be Found in Public!
Paul Teich spoke at SEMI Texas Spring Forum on Thu 5/25 in Austin.

You’ll also spot TIRIAS Research’s Principal Analysts attending these events over the next month:

  • Augmented World Expo
  • HPE Discover
  • DAC

Unfortunately, there are no prizes awarded for spotting us.

As always, we encourage your feedback
Kevin Krewell, Jim McGregor, Paul Teich

TIRIAS Research is a high-tech research and advisory firm, an independent third-party resource to high-tech companies. We provide custom research and advisory services on technologies, markets and ecosystems to a select group of technology industry leaders. Our Principal Analysts have decades of in-depth expertise in silicon, software, and systems specification, design and deployment.
About us

Domain: Electronics
Category: Semiconductors

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