The intense speculation about whether high-k dielectrics and metal gates would be used at the 45-nm node ended with a double-barreled blast Friday night (Jan. 26) when Intel and IBM announced separately that they will use the new materials in the heart of their next-generation transistors.
After years of struggle to overcome issues with mobility degradation, threshold voltage stability, and the metal gate electrodes, technologists at both companies said they are now confident that high-k dielectrics and metal gate electrodes are ready for manufacturing.
T.C. Chen, vice president of science and technology at IBM Research, said “after more than ten years of effort, we have found a way forward.”
Intel co-founder Gordon Moore said in a statement that the breakthrough represents “the biggest change in transistor technology since the introduction of the polysilicon gate MOS transistors in the late 1960s.”
Comparing Intel’s 65-nm devices and the forthcoming high-k enabled 45-nm transistors, Intel senior fellow Mark Bohr said the improvements include a reduction in switching power consumption of 30 percent, a 20 percent improvement in switching speed, or, alternatively, an ability to reduce leakage from the source and drain by five times.
Intel will trade off switching speed and power consumption, the Ion and Ioff curve, according to the product requirements, he added.
Introducing the physically thicker hafnium-based oxide into the gate stack will result in a reduction of gate oxide leakage “by more than a factor of 10, which would not be possible without high-k and metal gates,” Bohr said.
Bernie Meyerson, IBM’s chief technology officer for the group that includes servers and microelectronics, said the high-k advance opens the door to scaling improvements in all the major metrics of transistor performance: performance, power consumption, and size.
Even without high-k and metal gates, IBM will reach 5 GHz speeds in the company’s Power 6 processor on a 65-nm process. “When we drop in high-k (at the 45-nm node), we can crank that speed higher. And I can tell you, high-k is done. We have it in our pocket, and we have submitted a paper for the 2007 Symposium on VLSI Technology (scheduled for June in Kyoto, Japan),” Meyerson said.
The IBM press announcement (see the WeSRCH press release section) said the company has “inserted the technology into its state-of-the art semiconductor manufacturing line in East Fishkill, N.Y., and will apply it to products with chip circuits as small as 45-nm starting in 2008.”
Bohr, who manages Intel’s process development team in Hillsboro, Ore., declined to detail the high-k material other than to say it is a hafnium-based dielectric. He also did not disclose the metal gate electrodes, saying that Intel engineers had gone through a long, painstaking analysis of many metal and high-k combinations to identify the materials set.
In 2003, Robert Chau, an Intel research director, announced at a conference in Japan a working high-k and metal gate transistor solution. Bohr said that research demonstration gave the process development team at Intel’s Technology and Manufacturing Group the confidence that a manufacturable high-k and metal gate solution could be developed for the 45-nm node. Bohr said while the dielectric remains a hafnium-based material, the Intel team identified a better metal for the PMOS electrode than the one first used in 2003.
“I’d like to stress that this is not a laboratory device,” Bohr said. “It is an integrated 45 nm process that has high-performance, low leakage, and which meets all of Intel’s reliability requirements. It is manufacturable in high volumes. And the benefits we talk about are compared to today’s 65-nm technology used by Intel. We are not comparing our 45-nm process against some simple straw man, but against the industry-leading 65-nm process.”
Depending on the product – ranging from servers to cellphones – leakage at both the source-drain and at the gate has become a major issue, especially for battery-powered systems. For tethered systems, active switching power remains a larger component of total power consumption than leakage, but the trend line for leakage was such that – if a high-k solution had not been found -- it soon would account for about half of all power consumption for some systems.
“I won’t claim that gate leakage is bigger than source-drain leakage; the leakage at the sub-threshold is the biggest component. However, gate leakage was climbing dramatically, and that is the main reason Intel didn’t do gate oxide scaling (at the 65-nm node). Our gate oxide was close to 1.2 nm when we introduced at 90-nm, and stayed at about that level. We had hit a wall. Without gate scaling as the key component for performance, luckily, we were able to develop strained silicon techniques which kept performance improvements on track,” he said.
Intel will use atomic level deposition (ALD) tools as part of the high-k oxide manufacturing process, Bohr said.
Penryns ready to roll on high-k enhanced 45-nm platform
As part of the high-k and metal gate 45-nm rollout, Bohr demonstrated working silicon of several members of the Penryn family of microprocessors that go into manufacturing in the second half of this year.
Intel plans to make dual-core and quad-core Penryn implementations, beginning in the second half of this year at the D1D fab in Hillsboro, Ore. and then moving to two high-volume 45-nm fabs at Chandler, Ariz. and Israel. Intel will have three factories in production by the first half of next year making 45-nm processors with high-k and metal gates.
The initial dual-core implementations of the Penryn processor family will have 410 million transistors, while the quad-core products will have twice that number. The 45-nm quad-core products will reach the market in the second half of next year, with server-workstation and desktop versions. The Penryn mobile product family will come in dual-core implementations only.
The Penryn MPUs include an updated microarchitecture, and new instructions for media processing and high-performance applications, Bohr said. The product family supports higher core speeds, larger caches, and new power management modes.
Bohr said the first packaged 45-nm Penryn parts arrived at Intel’s campus in Oregon recently at 1 a.m., and by 3 a.m. the product development team had booted the Windows XP operating system. They celebrated with sparkling cider in the early morning hours.
Since then, the Linux and Apple operating systems have been booted on the Penryn silicon as well.