T.P Ma, a professor at Yale University, is the dean of high-k researchers in academia. His take on both Intel and IBM announcing high-k and metal gate solutions for the 45-nm node?
“Maybe Nature is still with us, just like with silicon dioxide long ago. And you have to credit the hundreds of engineers in this industry who made such systematic studies of these materials.”
At one level, the high-k and metal gate story is one of corporate competition, of AMD and IBM competing with Intel to get to a high-k solution.
The bigger picture is how the need for a new gate dielectric stimulated the chip industry’s equivalent of the Apollo program. Only the EUV lithography program resembles the high-k development effort in scope and importance.
Ma said the bottom interface, where the channel and the high-k dielectric meet, was particularly troublesome as researchers worked on hafnium-based solutions. To keep hafnium atoms from diffusing into the channel, most research teams have added silicon and nitrogen to hafnium and oxygen to create a more stable material at the bottom interface.
Ma speculated that both Intel and IBM initially will use a nitridized form of hafnium oxide, perhaps with a dielectric k value in range of 10-12, compared with 7 to 7.5 for the nitridized forms of silicon dioxide. “If they can get to 10 or 12, that certainly makes it worthwhile. Then they can keep scaling up to 20 or 30 by creating an oxide without the silicate. The big challenge was creating an entire manufacturing process that gives you good yield.”
Ma said getting high-k on the roadmap keeps the industry on Moore’s Law. “The industry was fortunate, because strained silicon was not on the roadmap, but that came along and kept performance going up at the 90- and 65-nm generations. So getting high-k now is certainly exciting.”
At one point, getting a decent high-k solution looked pretty iffy. Eearly studies showed a 50 percent reduction in carrier mobility through the channel -- discouraging indeed.
“Solving the mobility problem was partly just good interface engineering, but it also involved pure luck. What the research community found was that when these high-k layers got to a certain thinness that the major problem of charge trapping cleared up. When the layer got thin enough, we found the charge traps would go in one way and out the other, and that was pure luck.”
About weQuest: weQuest's are written by G Dan Hutcheson, his career spans more than thirty years, in which he became a well-known as a visionary for helping companies make businesses out of technology. This includes hundreds of successful programs involving product development, positioning, and launch in Semiconductor, Technology, Medicine, Energy, Business, High Tech, Enviorntment, Electronics, healthcare and Business devisions.