SEMICONDUCTOR ANALYTICS
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TSMC kicks off 45-nm technology

Posted on: 09-Apr-2007

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Taiwan Semiconductor Manufacting Co. kicked off its 45-nm technology today, announcing that it is in full swing with CyberShuttle runs in preparation for first wafer outs in September. With one shuttle run completed, CyberShuttles will roll in May, September and December of this year, and every other month next year.
The Taiwan foundry will start making wireless and portable ICs in volumes in the first half of next year on its low-power (LP) process. A mixed-signal and RF optimized flavor will begin shipping in the second quarter of next year.
It will then move to its cost-optimized general consumer (GC) and high performance GS (a new moniker which stands for General Superb) variants later in the year.
Chuck Byers, the company’s worldwide brand manager, said TSMC will move quickly to offer mixed-signal and other “varietal nodes” within the 45-nm generation. “We are bringing out our analog and mixed-signal IP earlier and earlier in the process of bringing up a new technology generation,” Byers said.
Details on some of those varieties will come tomorrow (April 10th). TSMC will host its annual technology symposium Tuesday in Silicon Valley, to be followed by stops in Austin and other cities next week.
For the 45-nm process, Byers said the two significant differences are immersion lithography and a more aggressive low-k, with a bulk k-value of 2.5 instead of the 2.9 at the 65-nm node. The smaller transistor makes it possible to place 500 million of them on a 70 sq. mm die.
TSMC did not move to a high-k gate dielectric at the 45-nm node, “because we didn’t need it,” said Byers.
The design for manufacturability (DFM) guidelines and toolkit utilities have grown more extensive in the last few years, particularly as variability among transistors in a circuit has become a gating factor. At the 45-nm generation TSMC promises to provide “additional manufacturing variance data” to its design tool partners, as well as a DFM Data Kit (DDK) for third-party EDA vendors.
TSMC, with nearly $10 billion in revenues in 2006, is experiencing a slow first quarter, with a 1.7 percent contraction in wafer output for the first quarter. That follows a 19 percent year-on-year increase in revenues for 2006.
The company is announced the 45-nm technology as the 65-nm generation begins to show up in the company’s revenue picture. For the fourth quarter of 2006, 90-nm production accounted for 23 percent of TSMC’s total sales, and 65-nm revenues were insignificant. This year, 65-nm will begin to contribute, with a few tens of thousands of 65-nm wafer starts.
 
 
 

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